said: 
>The fastest response comes from dedicated hardware, and I don't mean 
>"computer" hardware.  I'm talking analog -- opamps with fast slew rates 
>or whatever.  It's been a few years since I designed analog pc boards 
>(remember Bishop Graphics and all their circuit design stickies?), but 
>even back then the response was "instantaneous".  I _think_ slew rates 
>are about 20 volts/usec these days for an off-the-shelf opamp. 
You are preaching to choir.  You've got to remember I've been involved in 
some aerospace stuff.  Things like a positioning systems with arc-sec 
accuracy requirements.  The inner loops where invariably analog.  Some of 
this was to avoid the effects of digital math on the servo loops.  Most 
was because it was the cheapest way to achive the required loop response.  
My stuff was the outer loops and command and control.  Even this was 
required a fair amout of processing power.   The DSP we used was capable 
of implementing a 50 block control loop with several filters in 800 uSec. 
>That's the kind of thing I'm interested in.  _Why_ is "1 msec" the point 
>where you feel OS/2 "hits the wall"? 
It's not so much as hits the wall, as diminishing returns.  Ideally you 
want to write as much of the application as possible in ring 3.  This 
requires context switches.  My understanding is the the OS/2 scheduler 
will not guarantee an context switch to even the highest priority process 
in much less than this. 
Also, the style guidelines allow driver's to keep control, in ring 0, from 
longer than you would prefer in a hard read-time system. 
>Is the amount of latency in the OS/2 interrupt handler enough to keep 
>OS/2 from achieving a 100 usec response time? 
No, the interrupt latency is not that bad.  It's the context switching 
that is the issue. 
>Hah, you got me.  What is a "context hook"? 
You know those DDK books you misplaced... 
A context hook allows an interrupt handler to schedule part of itself to 
run at task time (i.e. just before the sceduler would return control to an 
interrupted process).  This code is interruptable, so it can do the work 
it needs without holding off other pending interrupts. 
Steven 
--  
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"Steven Levine"   MR2/ICE 2.19z #10183 Warp4/FP11 
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